/**
 * @file    drv_clk.h
 * @brief   系统时钟驱动
 * @author  Liu Wei
 * @version 1.0.1
 * @date    2023-04-14
 * 
 * @copyright Copyright (c) 2023 JBD-Energy Storage Technology Co. LTD
 * 
 * @par 修改日志:
 * <table>
 * <tr><th>Date       <th>Version   <th>Author   <th>Description
 * <tr><td>2023-04-14 <td>1.0.1     <td>Liu Wei  <td>首次创建
 * </table>
 */
#ifndef __DRV_CLK_H_
#define __DRV_CLK_H_

/* File Includes -------------------------------------------------------------*/

/* Cplusplus -----------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif

/* Macro/Define/Typedef ------------------------------------------------------*/
typedef enum
{
	SYS_FREQ_LOW = 24000000,   /* 低速*/
	SYS_FREQ_MID = 64000000,   /* 中速*/
	SYS_FREQ_HIGH = 192000000,  /* 高速*/
}SYS_CLK_TYPE;

/* @brief */

/* Variables -----------------------------------------------------------------*/

/*******************************************************************************
* define Interface module
*
* @addtogroup API LIST 
*******************************************************************************/
void drv_clk_set_sys(SYS_CLK_TYPE clk_fre);

/*! @} End of Interface API List */

#ifdef __cplusplus
}
#endif

#endif  /* #ifndef __DRV_CLK_H_ */
/********** Copyright (c) 2023 JBD-Energy Storage Technology Co. LTD *********/



